Turns out I just lost my Minecraft world with all my experimental zero-latency logic stuff including a complete RAM module I worked 20 hours on

Great

No backups? Look into TestDisk or PhotoRec to possibly recovery your data.

Refactors happen

Delayless gates?
Please explain. Im interested how.

@Gregozor2121I'll have to work some more on it first but it allows you to build completely delay-less logic. It's actually pulse logic but it has a max frequency of 1.25 Hz (although I may have found a way to double that). There's also a 5 Hz version (which is as fast as it gets without any additional exploits) but that only works as a data bus. It uses a version of instant piston repeaters

On the lost world I build a 4 bit adder so it's fully functional right now but I have to reverse engineer the code some more before I can write blog posts about it

Oh yeah it only works on beta 1.7 as far as I know. Haven't tested it in newer versions but it should essentially still work

@12bitfloat Never really got into MC modding. I love playing the game though. Please post here about your modding. I may want to try out your mods.

@Demolishun That isnt modding, that is redstone engineering.

@12bitfloat
I have build a 8 bit cpu that had a clock of 3Hz but i had to slow it down after adding some stuff because (i was using few mods), gates didnt even register the pulse.
I had to hold themfor quite few ticks because those gate mods just dont update their IO fast enough :(

@Gregozor2121 Wait how did you get 3 Hz?

@12bitfloat Mods for gates.
Mostly projectE for gates and chicken bones wireless redstone for wireless connections (much faster than bundled cables + no need for repeaters)

One problem that i encountered is that gates wont react and sense the pulse (propably because of the amount of gates) if the signal pulses too quickly. This is why i had to slow down the clock for the next version.

@12bitfloat Nevermind it was 1Hz
I had to slow it down further when i added a 16*8bit hardware stack

The 1Hz version had 8x8bit RAM and 16x8bit program memory (4bits for the instruction and 4bits for the parameters, but mostly used to point to the RAM address) + only add option in ALU with overflow flag, that flag was used in one instruction to create a conditional jump. Nearly all instructions have 2 cycles execution exept alu add, that takes 3 cycles.
You can see v1 in my rants. v2 was the fast 1Hz version and wip v3 was supposed to have a stack to allow recursion and clockless architecture.